CVE-2018-5407

Published November 15th, 2018

View on NVD ↗

CVSS v3

4.7

MEDIUM

CVSS v2

1.9

LOW

Affected

PROJECT

Description

Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on 'port contention'.

bbbrumley/portsmash

GitHub

471